A 0.0084-mV-FOM, Fast-Transient and Low-Power External-Clock-Less Digital LDO Using a Gear-Shifting Comparator for the Wide-Range Adaptive Sampling Frequency.
Jooeun BangSeojin ChoiSeyeon YooJeonghyun LeeJuyeop KimJaehyouk ChoiPublished in: ESSCIRC (2021)
Keyphrases
- low power
- adaptive sampling
- power consumption
- wide range
- high speed
- mixed signal
- monte carlo
- random sampling
- low cost
- vlsi circuits
- single chip
- wireless transmission
- logic circuits
- high power
- low power consumption
- vlsi architecture
- power reduction
- cmos technology
- data sets
- gate array
- control charts
- digital signal processing
- real time
- power dissipation
- neural network
- image sensor
- state space
- ultra low power