Design and implementation of packet classification with FPGA (abstract only).
Yong-Gang WangTian-Xin YanPublished in: FPGA (2005)
Keyphrases
- hardware architecture
- hardware implementation
- pattern recognition
- hardware design
- classification accuracy
- fpga implementation
- multi class
- hardware architectures
- support vector
- fpga device
- fpga technology
- hardware software co design
- current status
- machine learning
- reconfigurable hardware
- design methodology
- verilog hdl
- feature selection
- classification algorithm
- case study
- feature space
- design process
- training set
- high speed
- real time
- xilinx virtex
- support vector machine
- low cost
- efficient implementation
- single chip
- class labels
- field programmable gate array
- classification scheme
- power consumption