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A Platform of Resynthesizing a Clock Architecture Into Power-and-Area Effective Clock Trees.
Tung-Liang Lin
Sao-Jie Chen
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
Keyphrases
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power consumption
duty cycle
real time
high speed
decision trees
low power
distributed architecture
power management
e learning
high quality
simulation environment
core components
service management
power grid
computational power
cross platform
layered architecture