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Clock Generation and Distribution of a Dual-Core Xeon Processor with 16MB L3 Cache.
Simon Tam
Justin Leung
Rahul Dilip Limaye
Sam Choy
Sujal Vora
Mitsuhiro Adachi
Published in:
ISSCC (2006)
Keyphrases
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high speed
times faster
multithreading
embedded processors
query processing
data access
processor core
memory subsystem
probability distribution
power consumption
multi core processors
memory hierarchy
data management
main memory
memory management