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Gate-Level Design Methodology for Side-Channel Resistant Logic Styles Using TFETs.

Ignacio M. Delgado-LozanoErica Tena-SánchezJuan NúñezAntonio J. Acosta
Published in: IEEE Embed. Syst. Lett. (2022)
Keyphrases
  • design methodology
  • chip design
  • design criteria
  • design process
  • design methodologies
  • physical design
  • design procedure
  • real world
  • object oriented
  • fuzzy neural network
  • input output
  • hw sw
  • real time
  • databases