FPGA interconnect design using logical effort.

Haile Yu Yuk Hei Chan Philip Heng Wai Leong

Published in: FPL (2008)

Keyphrases

high speed
software architecture
database
single chip
design process
verilog hdl
design decisions
computer aided
genetic algorithm
real time
knowledge based systems
hardware implementation
neural network
design tools
hardware design
data sets
real time image processing