Pipelined reconfigurable multiplication with constants on FPGAs.
Konrad MöllerMartin KummMarco KleinleinPeter ZipfPublished in: FPL (2014)
Keyphrases
- field programmable gate array
- hardware implementation
- smart camera
- reconfigurable hardware
- embedded systems
- parallel architecture
- fpga implementation
- low cost
- parallel computing
- image processing algorithms
- floating point
- hardware architecture
- data flow
- hardware design
- hardware software
- fpga technology
- arithmetic operations
- computing systems
- digital signal processing
- integer arithmetic
- multi objective evolutionary
- reconfigurable architecture
- lightweight
- matrix multiplication
- linear array
- general purpose
- traffic monitoring
- parallel architectures
- efficient implementation
- signal processing
- functional units
- multi objective
- case study
- image processing
- data sets