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Incorporating performance and testability constraints during binding in high-level synthesis.
Ashutosh Mujumdar
Rajiv Jain
Kewal K. Saluja
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1996)
Keyphrases
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high level synthesis
real world
constraint programming
linear constraints
computer systems
parallel architecture
design space exploration