Automatic generation of FPGA routing architectures from high-level descriptions.
Vaughn BetzJonathan RosePublished in: FPGA (2000)
Keyphrases
- high level
- low level
- automatically generate
- routing algorithm
- high speed
- routing problem
- routing protocol
- programming language
- shortest path
- low level features
- hardware implementation
- real time image processing
- field programmable gate array
- low cost
- network topology
- higher level
- wireless ad hoc networks
- intermediate level
- single chip
- interconnection networks
- conceptual model
- data acquisition
- response time
- semantic information
- hardware design
- network topologies
- signal processing
- inter domain
- travel distance