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Design of Parity Preserving Logic Based Fault Tolerant Reversible Arithmetic Logic Unit.
Rakshith Saligram
Shrihari Shridhar Hegde
Shashidhar A. Kulkarni
H. R. Bhagyalakshmi
M. K. Venkatesha
Published in:
CoRR (2013)
Keyphrases
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fault tolerant
fault tolerance
distributed systems
state machine
design process
load balancing
high assurance
micron cmos
response time
modal logic
parallel algorithm
interconnection networks
safety critical
database
access control
peer to peer
software engineering