Three Halves Make a Whole? Beating the Half-Gates Lower Bound for Garbled Circuits.
Mike RosulekLawrence RoyPublished in: CRYPTO (1) (2021)
Keyphrases
- lower bound
- logic circuits
- upper bound
- low power
- branch and bound algorithm
- np hard
- branch and bound
- objective function
- tunnel diode
- lower and upper bounds
- lower bounding
- high speed
- worst case
- delay insensitive
- optimal solution
- upper and lower bounds
- logic synthesis
- sample complexity
- dynamic programming
- linear programming relaxation
- analog circuits
- asynchronous circuits
- real time
- vlsi circuits
- power dissipation
- vc dimension
- electronic circuits
- competitive ratio
- high level synthesis
- power consumption