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A 24- μW 12-bit 1-MS/s SAR ADC With Two-Step Decision DAC Switching in 110-nm CMOS.
Yung-Hui Chung
Chia-Wei Yen
Meng-Hsuan Wu
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2016)
Keyphrases
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analog to digital converter
high speed
decision making
decision makers
low cost
random access memory
nm technology
sar images
decision rules
synthetic aperture radar
cmos technology
post processing
decision problems
image processing
analog vlsi