LPRAM: a novel low-power high-performance RAM design with testability and scalability.
Subhasis BhattacharjeeDhiraj K. PradhanPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2004)
Keyphrases
- low power
- low power consumption
- low cost
- single chip
- high speed
- power consumption
- logic circuits
- digital signal processing
- vlsi architecture
- gate array
- cmos technology
- wireless transmission
- signal processor
- design considerations
- high power
- ultra low power
- long range
- real time
- low complexity
- power reduction
- mixed signal
- vlsi circuits