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An Energy Efficient 32-nm 20-MB Shared On-Die L3 Cache for Intel® Xeon® Processor E5 Family.
Min Huang
Moty Mehalel
Ramesh Arvapalli
Songnian He
Published in:
IEEE J. Solid State Circuits (2013)
Keyphrases
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intel xeon
high performance computing
wireless sensor networks
shared memory multiprocessors
energy efficient
silicon on insulator
query processing
main memory
energy efficiency
dynamic random access memory
prefetching
memory hierarchy
sensor networks
computing systems
massively parallel
embedded processors