Hardware architecture for integrate-and-fire signal reconstruction on FPGA.
Guilherme CarvalhoJoão Canas FerreiraVítor Grade TavaresPublished in: DCIS (2020)
Keyphrases
- hardware architecture
- signal reconstruction
- hardware implementation
- compressive sensing
- field programmable gate array
- image reconstruction
- hardware architectures
- basis functions
- xilinx virtex
- associative memory
- processing elements
- random projections
- zero crossing
- signal processing
- computer vision
- efficient implementation
- image classification
- low cost
- real time