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A Novel Tool for Synthesis by Direct Mapping of Asynchronous Circuits from Extended STG Specifications.

Felipe MendesTiago S. CurtinhasDuarte Lopes de OliveiraHigor A. DelsotoLester de Abreu Faria
Published in: VLSI Design (2018)
Keyphrases
  • asynchronous circuits
  • delay insensitive
  • process algebra
  • model checking
  • information retrieval
  • database
  • low cost
  • texture synthesis