Login / Signup

A methodology for optimizing buffer sizes of dynamic dataflow fpgas implementations.

Ab Al-Hadi Ab RahmanSimone Casale BrunetClaudio AlbertiMarco Mattavelli
Published in: ICASSP (2014)
Keyphrases
  • real time
  • efficient implementation
  • design methodology
  • dynamically changing
  • dynamic environments
  • hardware implementation
  • search engine
  • object oriented
  • data flow
  • parallel computing
  • field programmable gate array