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A 65nm 1Gb 2b/Cell NOR Flash with 2.25MB/s Program Throughput and 400MB/s DDR interface.
Corrado Villa
Daniele Vimercati
Stefan Schippers
Salvatore Polizzi
Andrea Scavuzzo
Maurizio Perroni
Maurizio Gaibotti
Mauro Luigi Sali
Published in:
ISSCC (2007)
Keyphrases
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times faster
high speed
macroblock
user interface
neural network
response time
test cases
user friendly
allocation scheme