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Linear-programming-based techniques for synthesis of network-on-chip architectures.
Krishnan Srinivasan
Karam S. Chatha
Goran Konjevod
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2006)
Keyphrases
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linear programming
network on chip
interconnection networks
routing algorithm
multi processor
network simulator
dynamic programming
data transfer
optimal solution
fault tolerant
packet switched
multi core processors
np hard
multipath
shortest path
power dissipation
message passing
parallel algorithm
high speed