A chip solution to hierarchical and boundary-scan compatible board level BIST.

Oliver F. Haberl Thomas Kropf

Published in: Great Lakes Symposium on VLSI (1992)

Keyphrases

low cost
levels of abstraction
linear equations
real time
high speed
higher level
high density
circuit design
single chip
data sets
genetic algorithm
image segmentation
optimal solution
object boundaries
printed circuit boards