Low-latency VLSI architecture of a 3-input floating-point adder.

Andre Guntoro Manfred Glesner

Published in: APCCAS (2008)

Keyphrases

floating point
low latency
vlsi architecture
real time
high speed
low power
low complexity
vlsi implementation
fixed point
high throughput
highly efficient
instruction set
data flow
virtual machine
video sequences
stream processing