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ESD protection design for high-speed applications in CMOS technology.

Jie-Ting ChenChun-Yu LinRong-Kun ChangMing-Dou KerTzu-Chien TzengTzu-Chiang Lin
Published in: MWSCAS (2016)
Keyphrases
  • high speed
  • low power
  • cmos technology
  • single chip
  • power consumption
  • user interface
  • low cost
  • case study
  • design process
  • space time
  • efficient implementation
  • power dissipation
  • spl times
  • cmos image sensor