Critical-PMOS-aware clock tree design methodology for anti-aging zero skew clock gating.

Shih-Hsu Huang Chia-Ming Chang Wen-Pin Tu Song-Bin Pan

Published in: ASP-DAC (2010)

Keyphrases

design methodology
power consumption
power dissipation
clock gating
design process
fuzzy neural network
physical design
power reduction
object oriented
high speed
formal specification
design methodologies
low power
real time