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An Ultra-low-power True Single-phase Clocking Flip-flop with Improved Hold time Variation using Logic Structure Reduction Scheme.
Ming-Yan Tsai
Po-Yu Kuo
Jin-Fa Lin
Ming-Hwa Sheu
Published in:
ISCAS (2018)
Keyphrases
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flip flops
single phase
input output
power dissipation
multiple input
control algorithm
ultra low power