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A 0.82pJ/b 50Gb/s PAM4 VCSEL Driver with 3-Tap Asymmetric FFE in 12nm CMOS FinFET Process.

Milad Haghi KashaniHossein ShakibaAli Sheikholeslami
Published in: ESSCIRC (2023)
Keyphrases
  • high speed
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  • evolutionary algorithm
  • power consumption