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Optimizing Timing for Multi-bit Flip-Flop Intensive Designs Compatible with Commercial EDA Flow.

Ilseon HaTaewhan Kim
Published in: ISOCC (2023)
Keyphrases
  • flip flops
  • multiple input
  • power dissipation
  • master slave
  • pattern matching
  • case study
  • computational intelligence
  • high speed
  • low power