A 1.9mW Portable ADPLL-based Frequency Synthesizer for High Speed Clock Generation.

Ming-Hung Chang Zong-Xi Yang Wei Hwang

Published in: ISCAS (2007)

Keyphrases

high speed
phase locked loop
power consumption
low power
user friendly
real time
generation process
frame rate
high speed networks
generation method
response time
neural network
lightweight
database
mobile devices
artificial intelligence
multipath
learning algorithm
hd video
genetic algorithm