Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design.
Kugan VivekanandarajahThambipillai SrikanthanChristopher T. ClarkeSaurav BhattacharyyaPublished in: Embedded Systems and Applications (2003)
Keyphrases
- low power
- single chip
- power consumption
- low power consumption
- low cost
- high speed
- vlsi architecture
- logic circuits
- digital signal processing
- cmos technology
- power reduction
- memory hierarchy
- high power
- power dissipation
- gate array
- ultra low power
- mixed signal
- design process
- general purpose
- speculative execution
- design considerations
- digital camera
- low complexity
- response time