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Area-I/O Flip-Chip Routing for Chip-Package Co-Design Considering Signal Skews.
Jia-Wei Fang
Yao-Wen Chang
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2010)
Keyphrases
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high speed
low cost
analog vlsi
ibm power processor
input output
physical design
vlsi implementation
high density
single chip
routing problem
circuit design
ibm zenterprise
programmable logic
signal processing
non stationary
cmos technology
performs poorly
real time