Design and analysis of a low-power energy-recovery adder.

Nestoras Tzartzanis William C. Athas

Published in: Great Lakes Symposium on VLSI (1995)

Keyphrases

low power
logic circuits
ultra low power
power dissipation
low cost
vlsi architecture
high speed
power consumption
single chip
digital signal processing
gate array
cmos technology
low power consumption
vlsi implementation
mixed signal
energy dissipation
real time
low complexity
signal processing
power reduction