Hardware transactional memory architecture with adaptive version management for multi-processor FPGA platforms.
Jeevan SirkunanChia Yee OoiNasir Shaikh-HusinYuan Wen HauMuhammad N. MarsonoPublished in: J. Syst. Archit. (2017)
Keyphrases
- multi processor
- field programmable gate array
- single processor
- parallel architectures
- hardware design
- shared memory
- multi core processors
- parallel architecture
- hardware implementation
- parallel programming
- transactional memory
- parallel computing
- program execution
- commodity hardware
- low cost
- distributed memory
- management system
- massively parallel
- embedded systems
- speculative execution
- blue gene
- parallel processing
- message passing
- real time
- data management
- single chip
- parallel algorithm
- ibm zenterprise
- image processing algorithms
- computing systems
- parallel execution
- high end
- data processing
- low power
- resource manager
- software engineering
- parallel processors
- parallel computation
- parallel computers
- processing units