High-performance scheduling algorithm for partially parallel LDPC decoder.
Cheng-Zhou ZhanXin-Yu ShihAn-Yeu WuPublished in: ICASSP (2008)
Keyphrases
- scheduling algorithm
- load balance
- ldpc codes
- response time
- low density parity check
- distributed memory machines
- distributed memory
- distributed video coding
- scheduling strategy
- distributed source coding
- turbo codes
- decoding algorithm
- shared memory
- parallel computing
- error correction
- message passing
- video codec
- grid environment
- scheduling policies
- error concealment
- low complexity
- end to end
- video coding