Leakage power minimization for the synthesis of parallel multiplier circuits.
Keoncheol ShinTaewhan KimPublished in: ACM Great Lakes Symposium on VLSI (2004)
Keyphrases
- analog circuits
- logic synthesis
- power consumption
- objective function
- power dissipation
- parallel computing
- high speed
- parallel processing
- power reduction
- floating point
- program synthesis
- convex functions
- real time
- parallel implementation
- shared memory
- low power
- computer architecture
- parallel computation
- distributed memory
- computational power
- texture synthesis
- chip design