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ASIC implementation of random number generators using SR latches and its evaluation.

Naoya ToriiHirotaka KokuboDai YamamotoKouichi ItohMasahiko TakenakaTsutomu Matsumoto
Published in: EURASIP J. Inf. Secur. (2016)
Keyphrases
  • random number generators
  • hardware implementation
  • hardware architecture
  • circuit design
  • design methodology
  • random number
  • high resolution
  • super resolution