Pipelined Floating-Point Architecture for a Phase and Magnitude Detector Based on CORDIC.
Surapong PongyupinpanichManfred GlesnerPublished in: FPL (2011)
Keyphrases
- floating point
- floating point arithmetic
- instruction set
- fixed point
- square root
- phase information
- fpga implementation
- instruction set architecture
- data flow
- parallel architecture
- sparse matrices
- floating point unit
- image processing
- fast fourier transform
- hardware and software
- level parallelism
- fine grained
- access control