Hierarchical Benchmark Circuit Generation for FPGA Architecture Evaluation.
Cindy MarkScott Y. L. ChinLesley ShannonSteven J. E. WiltonPublished in: ACM Trans. Embed. Comput. Syst. (2012)
Keyphrases
- high speed
- real time
- hierarchical architecture
- hardware design
- hardware implementation
- hardware architecture
- software implementation
- analog vlsi
- fpga implementation
- hardware architectures
- data flow
- reconfigurable hardware
- fpga hardware
- fpga technology
- systolic array
- power reduction
- parallel architecture
- circuit design
- field programmable gate array
- hierarchical model
- design methodology
- network architecture
- multi layer
- coarse to fine
- parallel processing
- neural network