Design Verification Methodology of Pipelined RISC-V Processor Using C2RTL Framework.
Eiji YoshiyaTomoya NakanishiTsuyoshi IsshikiPublished in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2022)
Keyphrases
- conceptual framework
- functional verification
- design methodology
- web based educational systems
- main contribution
- methodological framework
- design principles
- theoretical framework
- software architecture
- general purpose
- core components
- single chip
- computer architecture
- engineering design
- instruction set
- computational framework
- application specific
- parallel processing
- conceptual model
- design process
- high speed