Internal Power Dissipation Modeling and Minimization for Submicronic CMOS Design.

Philippe Maurine Mustapha Rezzoug Daniel Auvergne

Published in: PATMOS (2000)

Keyphrases

power dissipation
power consumption
low power
chip design
cmos technology
power reduction
user interface
nm technology
logic circuits
digital signal processing
design methodology
finite state machines
design process
low cost
case study
circuit design
power saving
object oriented