Mixed signal compensation of sampling errors in ADCs due to noisy DPLL clock sources.

Hao Zheng Eric Thompson John Hogan Daniel O'Hare

Published in: NEWCAS (2021)

Keyphrases

mixed signal
low power
class noise
power consumption
vlsi circuits
high speed
multi channel
digital circuits
np complete
power dissipation
real time
first order logic
sat solvers
estimation error
propositional logic
signal processing