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Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs.

Yu HuVictor ShihRupak MajumdarLei He
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2008)
Keyphrases
  • logic synthesis
  • multi valued
  • feature points
  • quantum computing
  • heuristic search
  • answer set programming
  • bounded model checking
  • real time
  • objective function
  • inductive learning
  • sat solvers
  • symmetry breaking