An H-Tree Based Configuration Scheme for Reconfigurable DSP Hardware.
Andy WidjajaJosé G. Delgado-FriasPublished in: ESA/VLSI (2004)
Keyphrases
- low cost
- digital signal processor
- hardware implementation
- digital signal processing
- signal processing
- field programmable gate array
- hardware and software
- systolic array
- embedded systems
- protection scheme
- vlsi implementation
- real time
- digital signal
- pattern recognition
- optimal configuration
- hardware architecture
- parallel architecture
- computing systems
- low power
- high speed
- general purpose
- heterogeneous computing