Abstract Synthesis of Turbo Decoder Elements onto Reconfigurable Circuit.

Caaliph Andriamisaina Catherine Dezan Christophe Jégo Bernard Pottier

Published in: ERSA (2005)

Keyphrases

analog circuits
turbo codes
logic synthesis
high level
high speed
power reduction
reconfigurable architecture
low cost
low complexity
general purpose
power consumption
error correction
program synthesis
soft decision
distributed video coding
logic circuits
decoding process