A 72 dB-DR 465 MHz-BW Continuous-Time 1-2 MASH ADC in 28 nm CMOS.
Yunzhi DongJialin ZhaoWenhua YangTrevor C. CaldwellHajime ShibataZhao LiRichard SchreierQingdong MengJosé B. SilvaDonald PatersonJeffrey C. GealowPublished in: IEEE J. Solid State Circuits (2016)
Keyphrases
- cmos technology
- nm technology
- low power
- power consumption
- high speed
- low voltage
- single chip
- silicon on insulator
- analog to digital converter
- markov chain
- parallel processing
- low cost
- image sensor
- power dissipation
- optimal control
- cmos image sensor
- state space
- iterative learning control
- mixed signal
- markov processes
- wide dynamic range
- power management
- clock frequency
- sigma delta
- dynamic range
- dynamical systems
- database