Parallel architecture and hardware implementation of pre-processor and post-processor for sequence assembly.
Yuan-Hsiang KuoChun-Shen LiuYu-Cheng LiYi-Chang LuPublished in: ICASSP (2013)
Keyphrases
- parallel architecture
- hardware implementation
- systolic array
- parallel processing
- signal processing
- dedicated hardware
- hardware design
- efficient implementation
- software implementation
- high level synthesis
- processing elements
- field programmable gate array
- general purpose processors
- memory management
- image processing algorithms
- hardware architecture
- shared memory
- fpga implementation
- clock frequency
- parallel implementation
- image quality
- xilinx virtex
- general purpose
- scheduling problem
- synthetic aperture sonar
- real time