Partitioned Hybrid Encoding to Minimize On-Chip Energy Dissipation ofWide Microprocessor Buses.

Sharath Jayaprakash Nihar R. Mahapatra

Published in: VLSI Design (2007)

Keyphrases

energy dissipation
high speed
functional verification
physical design
circuit design
low power
low cost
ibm power processor
memory subsystem
design methodology
ibm zenterprise
traffic flow
chip design
real time
floating point
processor core
data streams