Login / Signup
A CMOS Majority Logic Gate and its Application to One-Step ML Decodable Codes.
Jing Guo
Shanshan Liu
Lei Zhu
Fabrizio Lombardi
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2019)
Keyphrases
</>
error correction
error correcting
delay insensitive
maximum likelihood
logical operations
error control
low power
high speed
chip design
cmos technology
logic programming
classical logic
multi valued
power consumption
random access memory
image sensor
asynchronous circuits
low complexity
low cost