Parallel Image Segmentation in Reconfigurable Chip Multiprocessors.
Raphael Fonte BoaAlexandre Marques AmaralDulcinéia Oliveira da PenhaCarlos Augusto Paiva da Silva MartinsPetr EkelPublished in: ISPA Workshops (2006)
Keyphrases
- image segmentation
- multithreading
- distributed memory
- low cost
- parallel implementation
- coarse grain
- shared memory
- fine grain
- systolic array
- parallel computing
- parallel architecture
- multiscale
- data parallelism
- parallel processing
- high speed
- highly parallel
- level parallelism
- hardware implementation
- segmentation algorithm
- markov random field
- graph cuts
- image processing
- computer vision
- level set method
- single chip
- massively parallel
- programmable logic
- reconfigurable hardware
- analog vlsi
- parallel algorithm
- field programmable gate array
- image segmentation algorithm
- parallel processors
- computational power
- multi core processors
- general purpose
- high density
- gray level