High performance and low-power finite impulse response filter based on ring topology with modified retiming serial multiplier on FPGA.
Bahram RashidiPublished in: IET Signal Process. (2013)
Keyphrases
- low power
- low power consumption
- finite impulse response
- high speed
- low cost
- power consumption
- single chip
- fir filters
- signal processor
- gate array
- filter bank
- hardware implementation
- filter design
- digital signal processing
- power reduction
- digital filters
- field programmable gate array
- logic circuits
- real time
- cmos technology
- perfect reconstruction
- frequency response
- signal processing
- noise reduction
- multiresolution
- pattern recognition