A low-power static dual edge-triggered flip-flop using an output-controlled discharge configuration.
Myint Wai PhyuWang Ling GohKiat Seng YeoPublished in: ISCAS (3) (2005)
Keyphrases
- low power
- power dissipation
- power consumption
- cmos technology
- low cost
- high speed
- flip flops
- single chip
- high power
- multiple input
- wireless transmission
- edge detection
- digital signal processing
- low power consumption
- vlsi circuits
- logic circuits
- mixed signal
- gate array
- real time
- power reduction
- digital camera
- digital images