High-Speed, Low-Power, and Small-Area Optical Receiver in 65-nm CMOS.
Akira TsuchiyaToshiyuki InoueKeiji KishineDaisuke ItoYasuhiro TakahashiMakoto NakamuraPublished in: ASICON (2023)
Keyphrases
- low power
- high speed
- cmos technology
- image sensor
- power consumption
- low cost
- nm technology
- single chip
- focal plane
- wireless transmission
- digital signal processing
- real time
- mixed signal
- vlsi circuits
- high power
- low power consumption
- power reduction
- logic circuits
- low voltage
- vlsi architecture
- ultra low power
- frame rate
- infrared
- gate array